strorage herachy

caching
-In computer science, a cache (pronounced /kæʃ/) is a collection of data duplicating original values stored elsewhere or computed earlier, where the original data is expensive to fetch (owing to longer access time) or to compute, compared to the cost of reading the cache. In other words, a cache is a temporary storage area where frequently accessed data can be stored for rapid access. Once the data is stored in the cache, it can be used in the future by accessing the cached copy rather than re-fetching or recomputing the original data.
A cache has proven to be extremely effective in many areas of computing because access patterns in typical computer applications have locality of reference. There are several kinds of locality, but this article primarily deals with data that are accessed close together in time (temporal locality). The data might or might not be located physically close to each other (spatial locality).

caching, coherency and consistency

Cache coherency problems can arise when more than one processor refers to the same data. Assuming each processor has cached a piece of data, what happens if one processor modifies its copy of the data? The other processor now has a stale copy of the data in its cache.
Cache coherency and consistency define the action of the processors to maintain coherence. More precisely, coherency defines what value is returned on a read, and consistency defines when it is available.
Unlike other Cray systems, cache coherency on Cray X1 systems is supported by a directory-based hardware protocol. This protocol, together with a rich set of synchronization instructions, provides different levels of memory consistency.
Processors may cache memory from their local node only; references to memory on other nodes are not cached. However, while only local data is cached, the entire machine is kept coherent in accordance with the memory consistency model. Remote reads will obtain the latest “dirty” data from another processor's cache, and remote writes will update or invalidate lines in another processor's cache. Thus, the whole machine is kept coherent.